DocumentCode :
3614142
Title :
RF power transistor design in standard digital CMOS technology
Author :
M. Tomaska;M. Krnac;R. Vazny
Author_Institution :
Microelectron. Dept., Slovak Univ. of Technol., Bratislava, Slovakia
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
243
Lastpage :
246
Abstract :
RF power transistor design in standard CMOS technology for the power amplifier in the frequency region of 1800MHz is key issue in this work. Transistor application in standard RF power amplifier topology is discussed in the sense of output power as well as power added efficiency. The RF CMOS power transistor layout is designed in Cadence Virtuoso layout editor using AustriaMicroSystems 0.35/spl mu/ CMOS technology. The RF power achieved at 50 Ohm load using designed transistor in class E power amplifier was 1 W at 1750 MHz with power added efficiency of 59.2% at 2.3V power supply voltage.
Keywords :
"CMOS technology","Radio frequency","Power transistors","Circuit topology","Parasitic capacitance","Mobile communication","Power generation","Low voltage","Power amplifiers","Radiofrequency amplifiers"
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Devices and Microsystems, 2002. The Fourth International Conference on
Print_ISBN :
0-7803-7276-X
Type :
conf
DOI :
10.1109/ASDAM.2002.1088517
Filename :
1088517
Link To Document :
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