Hardware implementation of a Montgomery modular multiplier in a systolic array

This paper describes a hardware architecture for modular multiplication operation which is efficient for bit-lengths suitable for both commonly used types of public key cryptography (PKC) i.e. ECC and RSA cryptosystems. The challenge of current PKC implementations is to deal with long numbers (160-2048 bits) in order to achieve system´s efficiency, as well as security. RSA, still the most popular PKC, has at its root the modular exponentiation operation. Modular exponentiation consists of repeated modular multiplications, which is also the basic operation for ECC protocols. The solution proposed in this work uses a systolic array implementation and can be used for arbitrary precisions. We also present modular exponentiation based on Montgomery´s Multiplication Method (MMM).