DocumentCode :
3614651
Title :
Reducing power density through activity migration
Author :
Seongmoo Heo;K. Barr;K. Asanovic
Author_Institution :
Lab. for Comput. Sci., MIT, Cambridge, MA, USA
fYear :
2003
fDate :
6/25/1905 12:00:00 AM
Firstpage :
217
Lastpage :
222
Abstract :
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Excessive junction temperature reduces reliability and can lead to catastrophic failure. We examine the use of activity migration which reduces peak junction temperature by moving computation between multiple replicated units. Using a thermal model that includes the temperature dependence of leakage power, we show that sustainable power dissipation can be increased by nearly a factor of two for a given junction temperature limit. Alternatively, peak die temperature can be reduced by 12.4/spl deg/C at the same clock frequency. The model predicts that migration intervals of around 20-200 /spl mu/s are required to achieve the maximum sustainable power increase. We evaluate several different forms of replication and migration policy control.
Keywords :
"Power dissipation","Packaging","Power system modeling","Temperature dependence","Integrated circuit modeling","Microprocessors","Integrated circuit reliability","Permission","Thermal management","Laboratories"
Publisher :
ieee
Conference_Titel :
Low Power Electronics and Design, 2003. ISLPED ´03. Proceedings of the 2003 International Symposium on
Print_ISBN :
1-58113-682-X
Type :
conf
DOI :
10.1109/LPE.2003.1231865
Filename :
1231865
Link To Document :
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