DocumentCode :
3614668
Title :
A real time, low latency, hardware implementation of the 2D discrete wavelet transformation for streaming image applications
Author :
O. Benderli;Y.C. Tekmen;N. Ismailoglu
Author_Institution :
Middle East Tech. Univ., Ankara, Turkey
fYear :
2003
fDate :
6/25/1905 12:00:00 AM
Firstpage :
142
Lastpage :
147
Abstract :
We present a 2D discrete wavelet transformation (DWT) hardware for applications where row-based raw image data is streamed in at high bandwidths and local buffering of the entire image is not feasible. The latency that is introduced as the images stream through the DWT filter and the amount of locally stored image data is a function of the image and tile size. For an n/sub 1//spl times/n/sub 2/ size image processed using (n/sub 1//k/sub 1/)/spl times/(n/sub 2//k/sub 2/) sized tiles, the latency is equal to the time elapsed to accumulate a (1/k/sub 1/) portion of one image. In addition, a (2/k/sub 1/) potion of each image is buffered locally. The proposed hardware has been implemented on an FPGA and is part of a JPEG2000 compression system designed as a payload for a low Earth orbit (LEO) micro-satellite, which is due to be launched in August 2003.
Keywords :
"Delay","Hardware","Discrete wavelet transforms","Streaming media","Tiles","Low earth orbit satellites","Bandwidth","Filters","Field programmable gate arrays","Transform coding"
Publisher :
ieee
Conference_Titel :
Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on
ISSN :
1520-6130
Print_ISBN :
0-7803-7795-8
Type :
conf
DOI :
10.1109/SIPS.2003.1235659
Filename :
1235659
Link To Document :
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