Control of charging in high aspect ratio plasma etching of integrated circuits

In this paper we discuss some recent studies on control of charging during plasma etching of silicon dioxide in integrated circuits. These are required to reduce the damage on the devices and allow further increase in speed and capacity of integrated circuits. Such possibilities have a bearing in development of telecommunications. In particular we discuss how properties of incoming ions, geometry of the nanostructure, aspect ratio and plasma properties affect the kinetics of charging.