Title :
Automatic optimization of wrapper parallel interface constructions applied to digital cores
Author :
M. Balaz;E. Gramatova;M. Fischerova
Author_Institution :
Inst. of Informatics, Slovak Acad. of Sci., Bratislava, Slovakia
fDate :
6/25/1905 12:00:00 AM
Abstract :
The paper deals with optimization techniques for parallel interface of a test wrapper for internal and external testing of an embedded core. The developed techniques have been implemented in a JAVA applet. This implementation allows not only to find the most optimal constructions of parallel scan lines but also to apply the whole test wrapper construction to a real core modeled by VHDL. The JAVA applet is accessible on the Internet.
Keywords :
"Java","Circuit testing","Design optimization","Internet","System testing","System-on-a-chip","Registers","Object oriented modeling","Informatics","Minimization"
Conference_Titel :
EUROCON 2003. Computer as a Tool. The IEEE Region 8
Print_ISBN :
0-7803-7763-X
DOI :
10.1109/EURCON.2003.1248143
