DocumentCode
3615641
Title
Burn-in stressing effects on post-irradiation annealing response of power VDMOSFETs
Author
S. Djoric-Veljkovic;I. Manic;V. Davidovic;S. Golubovic;N. Stojadinovic
Author_Institution
Fac. of Civil Eng. & Archit., Nis Univ., Serbia
Volume
2
fYear
2004
fDate
6/26/1905 12:00:00 AM
Firstpage
701
Abstract
The effects of pre-irradiation burn-in stressing on post-irradiation annealing response of power VDMOSFETs have been investigated. Threshold voltage rapid increase above its preirradiation value (rebound effect) and mobility increase up to the value somewhat higher than the one after irradiation have been observed during post-irradiation annealing. These phenomena occured with certain delay in pre-irradiation stressed devices. The underlying changes of gate oxide-trapped charge and interface trap densities have been calculated and analysed in terms of the mechanisms responsible for pre-irradiation stress effects.
Keywords
"Annealing","Stress","Threshold voltage","Artificial satellites","Life testing","Temperature","Orbits","Assembly systems","Qualifications","Delay"
Publisher
ieee
Conference_Titel
Microelectronics, 2004. 24th International Conference on
Print_ISBN
0-7803-8166-1
Type
conf
DOI
10.1109/ICMEL.2004.1314927
Filename
1314927
Link To Document