• DocumentCode
    3615756
  • Title

    Formal verification of digital circuits

  • Author

    A. Salem

  • fYear
    2004
  • fDate
    6/26/1905 12:00:00 AM
  • Firstpage
    15
  • Lastpage
    15
  • Keywords
    "Formal verification","Digital circuits","Hardware design languages","Binary decision diagrams","Computer graphics","Electronic design automation and methodology","Sequential circuits","Data structures","Boolean functions","Automata"
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
  • Print_ISBN
    0-7695-2182-7
  • Type

    conf

  • DOI
    10.1109/IWSOC.2004.1319841
  • Filename
    1319841
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3615756