DocumentCode
3615905
Title
Design and implementation of reciprocal unit using table look-up and Newton-Raphson iteration
Author
U. Kucukkabak;A. Akkas
Author_Institution
Dept. of Electr. & Comput. Eng., Koc Univ., Istanbul, Turkey
fYear
2004
fDate
6/26/1905 12:00:00 AM
Firstpage
249
Lastpage
253
Abstract
Combination of initial approximation through a table look-up and Newton-Raphson iteration is an effective way to compute reciprocal, which may replace the division operation. This paper presents the design and implementation of reciprocal unit, which computes the reciprocal of double precision of floating-point number in eleven clock cycles. The presented design utilizes a 2/sup 10/ /spl times/ 20 bits ROM followed by two Newton-Raphson iterations. The design is implemented in VHDL and synthesized to estimate the area and the worst case delay. Simulation results show that the least significand bit of the result cannot be guaranteed to be correct for all cases.
Keywords
"Piecewise linear approximation","Clocks","Read only memory","Delay estimation","Taylor series","Digital signal processing","Computational modeling","Digital arithmetic","Astronomy","Pipelines"
Publisher
ieee
Conference_Titel
Digital System Design, 2004. DSD 2004. Euromicro Symposium on
Print_ISBN
0-7695-2203-3
Type
conf
DOI
10.1109/DSD.2004.1333284
Filename
1333284
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