• DocumentCode
    3617529
  • Title

    Hardware/software managed scratchpad memory for embedded system

  • Author

    Andhi Janapsatya; Sri Parameswaran;A. Ignjatovic

  • Author_Institution
    Sch. of Comput. Sci. & Eng., New South Wales Univ., Sydney, NSW, Australia
  • fYear
    2004
  • fDate
    6/26/1905 12:00:00 AM
  • Firstpage
    370
  • Lastpage
    377
  • Abstract
    We propose a methodology for energy reduction and performance improvement. The target system comprises of an instruction scratchpad memory instead of an instruction cache. Highly utilized code segments are copied into the scratchpad memory, and are executed from the scratchpad. The copying of code segments from main memory to the scratchpad is performed during runtime. A custom hardware controller is used to manage the copying process. The hardware controller is activated by strategically placed custom instructions within the executing program. These custom instructions inform the hardware controller when to copy during program execution. Novel heuristic algorithms are implemented to determine locations within the program to insert these custom instructions, as well as to choose the best sets of code segments to be copied to the scratchpad memory. For a set of realistic benchmarks, experimental results indicate the method uses 50.7% lower energy (on average) and improves performance by 53.2% (on average) when compared to a traditional cache system which is identical in size. Cache systems compared had sizes ranging from 256 to 16K bytes and associativities ranging from 1 to 32.
  • Keywords
    "Hardware","Embedded software","Memory management","Embedded system","Scanning probe microscopy","Random access memory","Costs","Energy consumption"
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-8702-3
  • Type

    conf

  • DOI
    10.1109/ICCAD.2004.1382603
  • Filename
    1382603