DocumentCode :
3617925
Title :
CMOS LNA design for system-on-chip receiver stages
Author :
A. Telli;M. Askar
Author_Institution :
Inf. Technol. Inst., Sci. & Tech. Res. Council of Turkey, Ankara, Turkey
fYear :
2004
fDate :
6/26/1905 12:00:00 AM
Firstpage :
171
Lastpage :
174
Abstract :
Narrowband single-ended inductive source degenerated low noise amplifiers (LNAs) for "system-on-chip" receiver stages have been designed, simulated and compared using the Mietec CMOS 0.7 /spl mu/m process and the Cadence/BSIM3v3 tool with active or L-biased DC-bias circuitries. Since there is an intention to use LNAs for GSM and S-band low earth orbit (LEO) space applications, the operating frequencies have been chosen as 900 MHz, 2025 MHz and 2210 MHz.
Keywords :
"System-on-a-chip","Low earth orbit satellites","Narrowband","Active noise reduction","Circuit noise","Low-noise amplifiers","Circuit simulation","CMOS process","GSM","Frequency"
Publisher :
ieee
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2004. Digest of Papers. 2004 Topical Meeting on
Print_ISBN :
0-7803-8703-1
Type :
conf
DOI :
10.1109/SMIC.2004.1398195
Filename :
1398195
Link To Document :
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