Title :
Dynamic behavior optimization of the junctions with SIPOS layer termination
Author :
C. Baditoiu;C. Ravariu;A. Rusu;F. Udrea
Author_Institution :
Fac. of Electr. Eng., Valahia Univ. of Targoviste, Romania
fDate :
6/26/1905 12:00:00 AM
Abstract :
In the power devices domain, one of the key problem is the edge termination improving. This work proposes an optimisation of the structures with field electrode and SIPOS layer (semi-insulating polycrystalline silicon) in order to accomplish a maximum of the breakdown voltage with a smallest area consumed. For these kinds of structures physical models and some simulations regarding the dynamic behaviour are presented.
Keywords :
"Dielectric constant","Conductivity","Capacitance","Silicon","Anodes","Voltage","Spirals","Electrodes"
Conference_Titel :
Semiconductor Conference, 2004. CAS 2004 Proceedings. 2004 International
Print_ISBN :
0-7803-8499-7
DOI :
10.1109/SMICND.2004.1403019
