• DocumentCode
    3620624
  • Title

    Clocking circuits for wireline communications

  • Author

    J. Savoj;R. Harjani

  • fYear
    2005
  • fDate
    6/27/1905 12:00:00 AM
  • Firstpage
    526
  • Lastpage
    527
  • Keywords
    "Clocks","Phase locked loops","Jitter","CMOS process","Interpolation","Digital filters","Voltage-controlled oscillators","Circuit noise","Semiconductor device noise","Bonding"
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005
  • Print_ISBN
    0-7803-9023-7
  • Type

    conf

  • DOI
    10.1109/CICC.2005.1568723
  • Filename
    1568723
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3620624