Soft-output decoding of LDPC-MTR codes concatenation over two-track two-head E/sup 2/PR4 channel

Log-likelihood ratio (LLR) algebra implementation in Boolean logic mappings for maximum transition run (MTR) codes is presented. Consequently, soft-output decoding of low-density parity-check (LDPC) and MTR codes concatenation has been investigated in magnetic recording system. Two-track two-head E/sup 2/PR4 partial response model with symmetrical intertrack interference (ITI) was assumed. Effortless hardware implementation of the soft-output MTR decoder and the overall decoding complexity reduction is offered by proposed simulation scheme, while benefits have been confirmed with the computer simulation results.