DocumentCode :
3620958
Title :
On the Relation between Wire Length Distributions and Placement of Logic on Master Slice ICs
Author :
S. Sastry;A. Parker
Author_Institution :
Department of Electrical Engineering-Systems, University of Southern California, Los Angeles, CA
fYear :
1984
fDate :
6/6/1905 12:00:00 AM
Firstpage :
710
Lastpage :
711
Keywords :
"Wire","Logic arrays","Length measurement","Routing","Upper bound","Semiconductor device measurement","Wiring","Integrated circuit modeling","Electric variables measurement","Integrated circuit measurements"
Publisher :
ieee
Conference_Titel :
Design Automation, 1984. 21st Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0542-1
Type :
conf
DOI :
10.1109/DAC.1984.1585891
Filename :
1585891
Link To Document :
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