A broadband low spur fully integrated BiCMOS PLL for 60 GHz wireless applications

A fully integrated phase-locked loop (PLL) is produced in SiGe:C BiCMOS technology. The PLL has large bandwidth of 4.5 MHz to reduce the phase noise from the voltage-controlled oscillator (VCO). The spurious sidebands are as low as -64 dBc. A new technique of optimizing PLL parameters is presented. It gives additional attenuation of the spurious sidebands (10 dB) or PLL parameter values, which are easier to realize