DocumentCode :
3621801
Title :
ATPG implemented as an educational tool
Author :
A. Zemva;M. Leban;B. Zajc
Author_Institution :
Fakulteta za Elektrotehniko in Racunalnistvo, Ljubljana Univ., Yugoslavia
fYear :
1991
fDate :
6/13/1905 12:00:00 AM
Firstpage :
1540
Abstract :
The authors present an automatic test pattern generation system, called TEST, developed to upgrade software tools in the field of computer-aided design of digital integrated circuits. The TEST system consists of two modes for test generation. TEST-1 tries to generate a minimal test set for the complete single stuck-at-faults in the circuit, while TEST-2 generates a test for selected single stuck-at faults. Experimental results show that the test sets obtained by TEST-1 are nearly optimal.
Keywords :
"Automatic test pattern generation","Circuit testing","System testing","Automatic testing","Integrated circuit testing","Software testing","Software tools","Design automation","Digital integrated circuits","Circuit faults"
Publisher :
ieee
Conference_Titel :
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Print_ISBN :
0-87942-655-1
Type :
conf
DOI :
10.1109/MELCON.1991.162134
Filename :
162134
Link To Document :
بازگشت