• DocumentCode
    3622803
  • Title

    Hardware implementation of some DBMS functions using SPR

  • Author

    E. Jovanov;D. Starcevic;T. Aleksic;Z. Stojkov

  • Author_Institution
    Inst. ´Mihajlo Pupin´, Beograd, Yugoslavia
  • fYear
    1992
  • fDate
    6/14/1905 12:00:00 AM
  • Firstpage
    328
  • Abstract
    The sorting processor (SPR) is a sort-processor developed to accelerate some of the most frequently used functions of existing data base management systems (DBMS). Realized as an add-in coprocessor board, the SPR provides for a significant performance gain in existing computer architectures. Improved performance is obtained by migration of low-level non-numeric DBMS functions into hardware. The paper presents the basic architecture of a prototype version of the SPR and the hardware support for SORT, SELECT, PROJECT and JOIN operations. A SORT operation is based on the implementation of the improved recursive radix-sort method. Relational data base operations make use of equivalence classes (E-class) generated by the SPR during the basic radix sort or hashing operations. Performance measures given are obtained using the realized prototype SPR.
  • Keywords
    "Hardware","Coprocessors","Computer architecture","Prototypes","Acceleration","Relational databases","Sorting","Software prototyping","Central Processing Unit","Engineering management"
  • Publisher
    ieee
  • Conference_Titel
    System Sciences, 1992. Proceedings of the Twenty-Fifth Hawaii International Conference on
  • Print_ISBN
    0-8186-2420-5
  • Type

    conf

  • DOI
    10.1109/HICSS.1992.183181
  • Filename
    183181