DocumentCode :
3622971
Title :
ROM-based finite state machines with PLA address modifiers
Author :
T. Luba;K. Gorski;L.B. Wronski
Author_Institution :
Inst. of Telecommun., Warsaw Univ. of Technol., Poland
fYear :
1992
fDate :
6/14/1905 12:00:00 AM
Firstpage :
272
Lastpage :
277
Abstract :
An effective method for the synthesis of address modifiers in sequential circuits is described. The method, based on serial decomposition, substantially reduces the address modifier circuit complexity for a given microprogram memory size. It can be used effectively for PMS based designs and for full custom designs. The method was implemented in C++ on a PC. It was tested on standard finite state machine (FSM) benchmarks. Results indicate that for a wide range of cases the method gives a substantial (more than 50%) reduction of required ROM capacity, which may result in a saving of the silicon area in the actual full custom implementation.
Keywords :
"Automata","Programmable logic arrays","Read only memory","Circuit synthesis","Sequential circuits","Registers","Combinational circuits","Logic functions","Complexity theory","Feedback loop"
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1992., EURO-VHDL ´92, EURO-DAC ´92. European
Print_ISBN :
0-8186-2780-8
Type :
conf
DOI :
10.1109/EURDAC.1992.246232
Filename :
246232
Link To Document :
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