• DocumentCode
    3623543
  • Title

    An architecture for parallel interpretation: performance measurements

  • Author

    M. Manwaring;M. Chowdhury;V. Malbasa

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Washington State Univ., Pullman, WA, USA
  • fYear
    1994
  • Firstpage
    531
  • Lastpage
    537
  • Abstract
    An innovative architecture for parallel interpretation of high-level machine languages has been described by Manwaring et al. (1994). Performance measurements of the architecture, obtained by running representative benchmark programs on a cycle level simulator, are presented. The results show that a speed up of about two is achieved compared to the traditional sequential machine language interpretation on a single processor.
  • Keywords
    "Computer architecture","Measurement","Computer science","Synchronization","Computational modeling","Parallel processing","Traffic control","Character generation","Pipelines","Performance evaluation"
  • Publisher
    ieee
  • Conference_Titel
    EUROMICRO 94. System Architecture and Integration. Proceedings of the 20th EUROMICRO Conference.
  • Print_ISBN
    0-8186-6430-4
  • Type

    conf

  • DOI
    10.1109/EURMIC.1994.390361
  • Filename
    390361
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3623543