• DocumentCode
    3623598
  • Title

    Fourth-power law clock recovery with prefiltering

  • Author

    T. Fang;C.-F. Liu

  • Author_Institution
    Dept. of Electr. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
  • Volume
    2
  • fYear
    1993
  • Firstpage
    811
  • Abstract
    The performance of a clock recovery scheme employing fourth-power law nonlinearity and prefiltering is described. This scheme uses a prefilter centered at 1/4 of the symbol rate and of a bandwidth not greater than 1/8 of the symbol rate. It is found that time jitter due to self-noise can be completely eliminated if the signal is sent only during every other symbol period.
  • Keywords
    "Clocks","Jitter","Bandwidth","Baseband","Frequency response","Quadrature amplitude modulation","Filters","Signal design","Signal to noise ratio","Narrowband"
  • Publisher
    ieee
  • Conference_Titel
    Communications, 1993. ICC ´93 Geneva. Technical Program, Conference Record, IEEE International Conference on
  • Print_ISBN
    0-7803-0950-2
  • Type

    conf

  • DOI
    10.1109/ICC.1993.397385
  • Filename
    397385
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3623598