Title :
Advanced high-K/metal gate charge trapping memories for post-45 nm node
Author :
D.S. Golubovic;M. Boutchich;N. Akil;M.J. Van Duuren
Author_Institution :
NXP Semicond., Leuven
Abstract :
In this paper we present our recent results on charge trapping memory arrays with HfSiOx high -K dielectrics and TiN as the metal gate aimed at low power/low voltage embedded flash and E2PROM applications. HfSiOx/SiN memory arrays operated with moderately low program/erase voltages, with an excellent endurance and good retention up to 85°C are demonstrated.
Keywords :
"Nonvolatile memory","Silicon compounds","Electron traps","SONOS devices","Tunneling","Low voltage","Dielectric devices","Charge carrier processes","High-K gate dielectrics","Tin"
Conference_Titel :
Non-Volatile Memory Technology Symposium, 2007. NVMTS ´07
Print_ISBN :
978-1-4244-1361-4
DOI :
10.1109/NVMT.2007.4389937
