Title :
Subquarter-Micrometer P-Channel MOSFET´s with 80 Nm S/D Junctions
Author :
M. Miyake;T. Kobayashi;S. Horiguchi;K. Iwadate;K. Kurihara
Author_Institution :
NTT Electrical Communications Laboratories 3-1, Morinosato Wakamiya, Atsugi-shi, Kanagawa Pref., Japan
fDate :
5/1/1987 12:00:00 AM
Abstract :
Subquarter-micrometer p-channel MOSFET´s with extremely shallow S/D junctions (80 nm) and ultra thin gate oxide (3.5 nm) have been fabricated. The threshold voltage of -0.64V and a maximum transconductance of 280 mS/mm have been achieved for 0.18 um gate length MOSFET´s.
Keywords :
"Threshold voltage","Doping","Counting circuits","CMOS technology","Etching","Impurities","Ion implantation","Rapid thermal annealing","Writing","Plasma applications"
Conference_Titel :
VLSI Technology, 1987. Digest of Technical Papers. Symposium on
