Various MDCT implementations in 0.35μ CMOS

MDCT is the most computationally intensive operation in most audio compression standards. The paper presents ASIC implementations of five 12/36-point MDCT architectures. All IP cores are capable of computing forward and backward MDCT and this makes them universal in multimedia SoCs for accelerating the MP3 compression/decompression. The main difference between the presented architectures is in their level of parallelization ? from fully parallel to sequential architecture. The power consumption issues were observed with respect to different parallelization levels.