• DocumentCode
    3629570
  • Title

    Particularities of cyclic intelligent ADC design, implementation and adjusting

  • Author

    Anatoliy Platonov;Jakub Jasnos;Konrad Jedrzejewski;Lukasz Malkiewicz;Zbigniew Jaworski;Elzbieta Piwowarska;Pawel Studzinski

  • Author_Institution
    Warsaw University of Technology, Institute of Electronic Systems, Nowowiejska 15/19, 00-665, Poland
  • fYear
    2008
  • Firstpage
    43
  • Lastpage
    46
  • Abstract
    The paper presents the results of design, implementation and adjusting of the CMOS version of the hardware prototype of new “intelligent” cyclic analog-to-digit converter (IC ADC). There are presented the concept of intelligent conversion, main principles of practical implementation, main stages and particularities of design and adjusting the IC ADC.
  • Keywords
    "Signal design","Paper technology","Hardware","CMOS integrated circuits","Analog integrated circuits","Digital integrated circuits","Analog computers","CMOS logic circuits","Read only memory","Prototypes"
  • Publisher
    ieee
  • Conference_Titel
    Signals and Electronic Systems, 2008. ICSES ´08. International Conference on
  • Print_ISBN
    978-83-88309-47-2
  • Type

    conf

  • DOI
    10.1109/ICSES.2008.4673352
  • Filename
    4673352
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3629570