DocumentCode
3629571
Title
Design of 64-channel analogue multiplexer for neural application in CMOS 180 nm technology
Author
Maciej Kachel;Miroslaw Zoladz;Piotr Kmon
Author_Institution
Department of Measurements and Instrumentation, AGH University of Science and Technology, al. Mickiewicza 30, 30-059 Krakow, Poland
fYear
2008
Firstpage
77
Lastpage
80
Abstract
This paper presents the design and simulation of the 64 channel analogue multiplexer for neural signal recording system designed in CMOS 180 nm technology. Single channel sampling rate is 100 kHz and linear range of the input signal is +/−400 mV. For noise cancellation caused by digital part of the differential architecture with dummy channel has been used.
Keywords
"CMOS technology","Multiplexing","Crosstalk","Voltage","Signal design","Differential amplifiers","Noise reduction","Circuit noise","Parasitic capacitance","Instruments"
Publisher
ieee
Conference_Titel
Signals and Electronic Systems, 2008. ICSES ´08. International Conference on
Print_ISBN
978-83-88309-47-2
Type
conf
DOI
10.1109/ICSES.2008.4673362
Filename
4673362
Link To Document