DocumentCode :
3629743
Title :
Auto-zeroed high speed comparator for the column level readout circuit of a CMOS active pixel sensor based detector
Author :
Yan Li; Zhen Ji;Yavuz Degerli
Author_Institution :
Texas Instruments DSPs Laboratory, Faculty of Information Engineering, Shenzhen University, 518060, China
fYear :
2008
Firstpage :
332
Lastpage :
335
Abstract :
The detection systems of future high-energy physics experiments need high resolution pixel detectors allowing auto data sparsification. One solution is the CMOS active pixel sensor based detector, which allows integration of chip-level full data processing circuits. Designed for pixel signal readout, a column-level high speed, low-power and fully offset compensated comparator is developed. For an operation frequency of 100 MHz, the resolution is better than 0.5 mV and the residual offset is only 0.15 mVrms. The power dissipation is about 220 μW. The dimension is 25 μ×300 μm.
Keywords :
"Circuits","Latches","Detectors","Voltage","Physics","Signal resolution","CMOS process","Data processing","Signal design","Power dissipation"
Publisher :
ieee
Conference_Titel :
Anti-counterfeiting, Security and Identification, 2008. ASID 2008. 2nd International Conference on
ISSN :
2163-5048
Print_ISBN :
978-1-4244-2584-6
Electronic_ISBN :
2163-5056
Type :
conf
DOI :
10.1109/IWASID.2008.4688420
Filename :
4688420
Link To Document :
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