DocumentCode :
3630152
Title :
A system for calculating the Greatest Common Denominator implemented using Asynchrobatic Logic
Author :
David J. Willingham;Izzet Kale
Author_Institution :
Applied DSP and VLSI Research Group, University of Westminster, London, Great Britain. Email: D.Willingham@wmin.ac.uk
fYear :
2008
Firstpage :
194
Lastpage :
197
Abstract :
An Asynchrobatic system that uses Euclid´s Algorithm to calculate the greatest common denominator of two numbers is presented. This algorithm is a simple system that contains both repetition and decision, and therefore demonstrates that Asynchrobatic logic can be used to implement arbitrarily complex computational systems. Under typical conditions on a 0.35?m process, a 16-bit implementation can perform a 24-cycle test vector in 2.067?s with a power consumption of 3.257nW.
Keywords :
"Logic circuits","Pipelines","Design methodology","Control systems","Feedback","Switches","Logic testing","Adders","Digital signal processing","Very large scale integration"
Publisher :
ieee
Conference_Titel :
NORCHIP, 2008.
Print_ISBN :
978-1-4244-2492-4
Type :
conf
DOI :
10.1109/NORCHP.2008.4738310
Filename :
4738310
Link To Document :
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