Title :
Strategies in a cost-effective implementation of the PDC half-rate codec for wireless communications
Author :
G. Fettweis; Shihua Wang;S. Kobayashi;T. Kawasaki;S. Fujimaki;J. Muwafi;K. Gupta;M. Mitsutake;Y. Kameshima;H. Konoma;J. Zingman;E. Wu;Y. Mizushima;Y. Nambu;K. Yamozoe
Author_Institution :
TCSI Corp., Berkeley, CA, USA
Abstract :
An application specific 16-bit fixed-point DSP (AK 2377) has been developed which executes the PDC (Personal Digital Cellular) half-rate speech codec system, an 80 MOPS task, at only 20 MHz operation with a low-power consumption of 100 mW. This was achieved through an architecture which hosts a customized parallel data path with a low memory bandwidth, customized I/O, a VLIW-like instruction set, and software innovations to minimize the complexity requirements.
Keywords :
"Wireless communication","Digital signal processing chips","Digital signal processing","Speech codecs","Computer architecture","Technological innovation","Read only memory","Energy consumption","Clocks","Software design"
Conference_Titel :
Vehicular Technology Conference, 1996. Mobile Technology for the Human Race., IEEE 46th
Print_ISBN :
0-7803-3157-5
DOI :
10.1109/VETEC.1996.503437
