DocumentCode :
3631669
Title :
One channel capacitance tomograph with hardware implementation of image reconstruction algorithm
Author :
Piotr Czarnecki;Lukasz Danko;Roman Szabatin
Author_Institution :
Institute of Radielectronics, Warsaw University of Technology, Poland
fYear :
2009
Firstpage :
242
Lastpage :
246
Abstract :
One channel capacitance tomograph was described. Its modular design gives the opportunity to test different measurement circuits. Described tomograph use measurement circuit based on CDC (Capacitance-to-Digital Converter). Control unit of the tomograph was implemented inside FPGA as a microprocessor system with hardware implementation of image reconstruction algorithm. The Landweber iterative image reconstruction algorithm was implemented. Capacitance tomography
Keywords :
"Electrical capacitance tomography","Hardware","Image reconstruction","Capacitance measurement","Field programmable gate arrays","Ethernet networks","Circuit testing","Semiconductor device measurement","Control systems","Microprocessors"
Publisher :
ieee
Conference_Titel :
Imaging Systems and Techniques, 2009. IST ´09. IEEE International Workshop on
ISSN :
1558-2809
Print_ISBN :
978-1-4244-3482-4
Type :
conf
DOI :
10.1109/IST.2009.5071642
Filename :
5071642
Link To Document :
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