Title :
A novel test structure to study intrinsic reliability of barrier/low-k
Author :
Larry Zhao;Zsolt Tokei;Gianni Giai Gischia;Marianna Pantouvaki;Kristof Croes;Gerald Beyer
Author_Institution :
Technology and Manufacturing Group, Intel Corporation, Leuven, Belgium
Abstract :
A novel test structure to study intrinsic reliability of barrier/low-k is proposed. The structure is based on a planar capacitor design where low-k film is deposited after the patterning of the capacitor, followed by metallization and Cu CMP. This so called low-k planar capacitor structure provides several unique capabilities to study various aspects of barrier/low-k TDDB compared with the conventional damascene structures. Two of the unique capabilities are presented in this paper. First, TDDB from a damage-free low-k material has been measured for the first time using the low-k planar capacitor structure. Second, the test structure is sensitive enough to quantify the impact of selected process conditions, such as barrier re-sputter and plasma treatments, on TDDB.
Keywords :
"Testing","Plasma measurements","Probes","Capacitance-voltage characteristics","Passivation","Breakdown voltage","Performance evaluation","Needles","MOS capacitors","Manufacturing"
Conference_Titel :
Reliability Physics Symposium, 2009 IEEE International
Print_ISBN :
978-1-4244-2888-5
Electronic_ISBN :
1938-1891
DOI :
10.1109/IRPS.2009.5173364