DocumentCode
3632678
Title
Generative programming with support for formal verification
Author
Marek Paska
Author_Institution
University of West Bohemia, Department of Computer Science and Engineering, Pilsen, Czech Republic
fYear
2009
Firstpage
58
Lastpage
61
Abstract
This paper presents a novel approach to software development, mainly useful for embedded devices. Embedded software is described in a programming language with very high level of abstraction. Efficient production code is generated from this description; also code suitable for formal verification is generated. The paper investigates efficiency of both the verifiable and the production code.
Keywords
"Formal verification","Embedded software","Computer languages","Embedded system","Production","Java","Embedded computing","Programming profession","Application software","Assembly"
Publisher
ieee
Conference_Titel
Industrial Embedded Systems, 2009. SIES ´09. IEEE International Symposium on
ISSN
2150-3109
Print_ISBN
978-1-4244-4109-9
Electronic_ISBN
2150-3117
Type
conf
DOI
10.1109/SIES.2009.5196194
Filename
5196194
Link To Document