• DocumentCode
    3633516
  • Title

    Testing of crosstalk-type dynamic faults in interconnection networks with use of Ring LFSRs

  • Author

    Andrzej Hlawiczka;Krzysztof Gucwa;Tomasz Garbolino;Michal Kopec

  • Author_Institution
    Institute of Electronics, Silesian University of Technology, Gliwice, Poland
  • fYear
    2009
  • Firstpage
    530
  • Lastpage
    535
  • Abstract
    The paper highlights the need to apply the test-per-clock method at full clock rates to test crosstalks in networks of long interconnections between modules in a System on a Chip (SoC). The proposed method of testing n-interconnects involves the 3n-R-LFSR (Ring Linear Feedback Shift Register) with a polynomial that guarantees the long counting cycle. The part of the ring LFSR that generates test patterns has double number of flip-flops where every second flip-flop is connected to the network of interconnections under test. It has been proved that the 3n-R-LFSR register is capable to generate all the two-test patterns that are necessary for the network with n interconnections. The completed simulation experiments evidenced efficiency of the method application to test crosstalks that are manifested by either an glitch or an edge delay.
  • Keywords
    "Crosstalk","Multiprocessor interconnection networks","System testing","Flip-flops","Clocks","System-on-a-chip","Linear feedback shift registers","Polynomials","Test pattern generators","Delay"
  • Publisher
    ieee
  • Conference_Titel
    Mixed Design of Integrated Circuits & Systems, 2009. MIXDES ´09. MIXDES-16th International Conference
  • Print_ISBN
    978-1-4244-4798-5
  • Type

    conf

  • Filename
    5289460