Title :
Design and optimization of ColdFire CPU Arithmetic Logical Unit
Author :
Filip Adamec;Tomas Fryza
Author_Institution :
Department of Radio Electronics, Brno University of Technology, Czech Republic
Abstract :
This article describes design of ColdFire microprocessor ALU (Arithmetic Logical Unit) in VHDL language and presents an optimization to obtain maximum performance in Xilinx Virtex IV FPGA. The basic function of ALU is explained. There are described the instructions which any ALU must handle and some possibility how to design it. The advantages and disadvantages of performance are obtained as well.
Keywords :
"Design optimization","Arithmetic","Logic testing","Central Processing Unit","Field programmable gate arrays","Hardware","Microprocessors","Integrated circuit technology","Engines","Pipelines"
Conference_Titel :
Mixed Design of Integrated Circuits & Systems, 2009. MIXDES ´09. MIXDES-16th International Conference
Print_ISBN :
978-1-4244-4798-5
