Oversampled digital power controller with bumpless transition between sampling frequencies

In today´s digitally controlled power supplies fast analog-digital converters sampling at a multiple of the switching frequency are used to reduce the latency time of the conversion. Conversely, in many cases the actual compensator is still sampled at the switching frequency which introduces an additional latency time. To reduce this latency time, a new compensator architecture is presented in this paper which allows a bumpless transition between two compensators operating at two different sampling frequencies. Operating at the switching frequency during steady-state provides noise suppression, while operating at the full “oversampling” frequency during transients reduces the compensator´s latency time significantly. A method for the bumpless transition between the two compensators is presented which is simple to implement and can be easily integrated into existing control architectures. Experimental verification demonstrates clear performance gain over existing control architectures.