• DocumentCode
    3634642
  • Title

    Realizing Arbitrary-Precision Modular Multiplication with a Fixed-Precision Multiplier Datapath

  • Author

    Johann Großschädl;Erkay Savas;Kazim Yumbul

  • Author_Institution
    Univ. of Luxembourg, Luxembourg City, Luxembourg
  • fYear
    2009
  • Firstpage
    261
  • Lastpage
    266
  • Abstract
    Within the context of cryptographic hardware, the term scalability refers to the ability to process operands of any size, regardless of the precision of the underlying datapath or registers. In this paper we present a simple yet effective technique for increasing the scalability of a fixed-precision Montgomery multiplier. Our idea is to extend the datapath of a Montgomery multiplier in such a way that it can also perform an ordinary multiplication of two n-bit operands (without modular reduction), yielding a 2n-bit result. This conventional (n*n-≫2n)-bit multiplication is then used as a "sub-routine" to realize arbitrary-precision Montgomery multiplication according to standard software algorithms such as Coarsely Integrated Operand Scanning (CIOS). We show that performing a 2n-bit modular multiplication on an n-bit multiplier can be done in 5n clock cycles, whereby we assume that the n-bit modular multiplication takes $n$ cycles. Extending a Montgomery multiplier for this extra functionality requires just some minor modifications of the datapath and entails a slight increase in silicon area.
  • Keywords
    "Scalability","Hardware","Cryptography","Arithmetic","Field programmable gate arrays","Software standards","Software algorithms","Clocks","Silicon","Security"
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Computing and FPGAs, 2009. ReConFig ´09. International Conference on
  • Print_ISBN
    978-1-4244-5293-4
  • Type

    conf

  • DOI
    10.1109/ReConFig.2009.83
  • Filename
    5382062