DocumentCode :
3635069
Title :
Development Framework for Implementing FPGA-Based Cognitive Network Nodes
Author :
Jorg Lotze;Suhaib A. Fahmy;Juanjo Noguera;Baris Ozgul;Linda Doyle;Robert Esser
Author_Institution :
CTVR, Trinity Coll. Dublin, Dublin, Ireland
fYear :
2009
Firstpage :
1
Lastpage :
7
Abstract :
This paper identifies important features a cognitive radio framework should provide, namely a virtual architecture for hardware abstraction, an adaptive run-time system for managing cognition, and high level design tools for cognitive radio development. We evaluate a range of existing frameworks with respect to these, and propose a novel FPGA-based framework that provides all these features. By abstracting away the details of hardware reconfiguration, radio designers can implement FPGA-based cognitive nodes much as they would do for a software implementation. We apply the proposed framework to the design and implementation of a receiver node that works in two modes: discovery, where it uses spectrum sensing to find a radio transmission, and communication, in which it receives and demodulates the said transmission. We show how the whole design process does not require any hardware experience on behalf of the radio designer.
Keywords :
"Peer to peer computing","Field programmable gate arrays","Hardware","Computer architecture","Cognitive radio","Algorithm design and analysis","Runtime","Protocols","Adaptive systems","Cognition"
Publisher :
ieee
Conference_Titel :
Global Telecommunications Conference, 2009. GLOBECOM 2009. IEEE
ISSN :
1930-529X
Print_ISBN :
978-1-4244-4148-8
Type :
conf
DOI :
10.1109/GLOCOM.2009.5425633
Filename :
5425633
Link To Document :
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