Title :
Design-space exploration for CMOS photonic processor networks
Author :
Vladimir Stojanović;Ajay Joshi;Cristopher Batten;Yong-Jin Kwon;Scott Beamer;Sun Chen;Krste Asanović
Author_Institution :
Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, Massachusetts 02139
fDate :
3/1/2010 12:00:00 AM
Abstract :
Monolithically integrated dense WDM photonic network topologies optimized for loss and power footprint of optical components can achieve up to 4x better energy-efficiency and throughput than electrical interconnects in core-to-core, and 10x in core-to-DRAM networks.
Keywords :
"CMOS process","Optical interconnections","Energy efficiency","Optical buffering","Optical devices","Integrated circuit interconnections","Bandwidth","CMOS technology","Optical fiber networks","Photonic integrated circuits"
Conference_Titel :
Optical Fiber Communication (OFC), collocated National Fiber Optic Engineers Conference, 2010 Conference on (OFC/NFOEC)
DOI :
10.1364/OFC.2010.OWI1