DocumentCode :
3635424
Title :
Design-space exploration for CMOS photonic processor networks
Author :
Vladimir Stojanović;Ajay Joshi;Cristopher Batten;Yong-Jin Kwon;Scott Beamer;Sun Chen;Krste Asanović
Author_Institution :
Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, Massachusetts 02139
fYear :
2010
fDate :
3/1/2010 12:00:00 AM
Firstpage :
1
Lastpage :
3
Abstract :
Monolithically integrated dense WDM photonic network topologies optimized for loss and power footprint of optical components can achieve up to 4x better energy-efficiency and throughput than electrical interconnects in core-to-core, and 10x in core-to-DRAM networks.
Keywords :
"CMOS process","Optical interconnections","Energy efficiency","Optical buffering","Optical devices","Integrated circuit interconnections","Bandwidth","CMOS technology","Optical fiber networks","Photonic integrated circuits"
Publisher :
ieee
Conference_Titel :
Optical Fiber Communication (OFC), collocated National Fiber Optic Engineers Conference, 2010 Conference on (OFC/NFOEC)
Type :
conf
DOI :
10.1364/OFC.2010.OWI1
Filename :
5465639
Link To Document :
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