• DocumentCode
    3636190
  • Title

    Some aspects of designing real-time digital correlators for noise radars

  • Author

    Michał Meller

  • Author_Institution
    Telecommunications Research Institute (PIT S.A.), Department of Signal and Information Processing Hallera 233A, 80-502 Gdansk, Poland
  • fYear
    2010
  • fDate
    5/1/2010 12:00:00 AM
  • Firstpage
    821
  • Lastpage
    825
  • Abstract
    Real-time operation of a noise radar correlator requires massive processing power. At present, it can be provided at a reasonable cost only by FPGA devices. However, adopting this platform makes different aspects of the design important than in the case of microprocessor-based design. In particular, our efforts are directed towards minimizing device usage, rather than number of computations. Several options are reviewed in the paper with this purpose in mind.
  • Keywords
    "Correlators","Frequency","Radar signal processing","Field programmable gate arrays","Passive radar","Bandwidth","Clocks","Filters","Signal processing","Costs"
  • Publisher
    ieee
  • Conference_Titel
    Radar Conference, 2010 IEEE
  • ISSN
    1097-5659
  • Print_ISBN
    978-1-4244-5811-0
  • Electronic_ISBN
    2375-5318
  • Type

    conf

  • DOI
    10.1109/RADAR.2010.5494508
  • Filename
    5494508