DocumentCode :
3636604
Title :
Test generation for technology-specific faults in multi-output combinational modules
Author :
B. Zajc;A. Zemva
Author_Institution :
Dept. of Electr. Eng., Ljubljana Univ., Slovenia
Volume :
1
fYear :
1996
Firstpage :
381
Abstract :
In this paper the test generation method for technology specific faults in multi-output combinational modules is introduced. The method is based on the concept of detectable perturbations to generate tests that can then cover any technology-specific faults such as multiple bridging, open and stuck-at faults. Rather than devising a customized test pattern generation system for each class of technology-specific faults, we implemented a generic system to generate tests for single and multiple perturbations. Experimental results provide useful insights about the quality of single stuck-at test patterns versus additional classes of faults.
Keywords :
"CMOS logic circuits","Wires","System testing","Logic devices","Semiconductor device modeling","Electronic mail","Electrical fault detection","Routing","Field programmable gate arrays","Libraries"
Publisher :
ieee
Conference_Titel :
Electrotechnical Conference, 1996. MELECON ´96., 8th Mediterranean
Print_ISBN :
0-7803-3109-5
Type :
conf
DOI :
10.1109/MELCON.1996.551561
Filename :
551561
Link To Document :
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