• DocumentCode
    3637684
  • Title

    Highly Efficient Transforms Module Solution for a H.264/SVC Encoder

  • Author

    Ronaldo Husemann;Mariano Majolo;Altamiro Susin;Valter Roesler;José Valdeni de Lima

  • Author_Institution
    Electr. Eng. Dept, UFRGS, Porto Alegre, Brazil
  • fYear
    2010
  • Firstpage
    86
  • Lastpage
    91
  • Abstract
    The computational-intensive demands of H.264 video encoder normally imply to the use of high performance hardware solutions like dedicated multimedia DSP or programmable logic devices. These demands can be even more critical when it is necessary to implement a H.264/SVC (Scalable Video Coding) solution, an emergent encoder standard that provides the generation of flexible and adaptive multi-layer streams. The complexity of a SVC encoder increases proportionally with number of configured layers, introducing new challenges to multimedia market. In this work we propose an efficient hardware module, responsible for the transform algorithms (Hadamard and DCT) of a SVC encoder, processing up eight samples per clock. The proposed module take into account specific memory demands in order to produce an optimized solution with respect to encoder performance and complexity, aiming to reach a realizable SVC encoder.
  • Keywords
    "Discrete cosine transforms","Static VAr compensators","Pixel","Proposals","Hardware","Streaming media"
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on
  • Print_ISBN
    978-1-4244-7321-2
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2010.87
  • Filename
    5571802