Leverage simulation for analyzing CBSE/MDD development process of embedded systems

Distributed embedded systems usually have strict quality requirements which need to be verified, and the allocation of software to hardware needs to be considered throughout the whole development process. In this paper, we present usage of simulation in analyzing development process of embedded systems using CARMA principle which combines two paradigms - Component-Based Software Engineering and Model Driven Development. In development process two types of parallel modeling of hardware are distinguished: modeling of a virtual hardware structure and of the physical structure. Two kinds of verification activities are introduced: milestone verification, which integrates the product requirements into the process through frequent analyses and measurements of the development artifacts, and exploratory analysis, which is informal and carried out by individual developers, similar to debugging. Based on the process model, we have constructed a queuing network model, used for simulations to further explore the characteristics of the development model. Initial simulations give by hand that by increasing the amount of analysis and verification in a project, more errors are found with the same amount of effort and time. There are also dependencies on project risks and the strength of the analysis tool support.