A ”multi-user” approach towards a channel decoder for convolutional, turbo and LDPC codes

In this paper we present the concept of a high-throughput multi-mode channel decoder architecture that consists of a tightly coupled array of independently programmable processing cores. Every core is capable of decoding low-density parity-check (LDPC), convolutional turbo (CTC) and con-volutional codes (CC) either independently or jointly with other cores. This approach allows parallel handling of several separate decoding processes in one decoder engine as well as performing a single high-throughput decoding, opening up a new level of flexibility for channel decoding. The multi-mode decoder core as well as the multi-core approach are explained and simulation results presented. A case study of the proposed architecture was implemented in a 65nm-process using an area of 0.44 mm². At 200 MHz, throughputs of up to 86 Mbps could be reached.