• DocumentCode
    3639837
  • Title

    Employing Multiple CUDA Devices to Accelerate LTL Model Checking

  • Author

    Jiri Barnat;Petr Bauch;Lubos Brim;Milan Ceska

  • Author_Institution
    Fac. of Inf., Masaryk Univ., Brno, Czech Republic
  • fYear
    2010
  • Firstpage
    259
  • Lastpage
    266
  • Abstract
    Recently, the CUDA technology has been used to accelerate many computation demanding tasks. For example, in our previous work we have shown how CUDA technology can be employed to accelerate the process of Linear Temporal Logic (LTL) Model Checking. While the raw computing power of a CUDA enabled device is tremendous, the applicability of the technology is quite often limited to small or middle-sized instances of the problems being solved. This is because the memory that a single device is equipped with, is simply not large enough to cope with large or realistic instances of the problem, which is also the case of our CUDA-aware LTL Model Checking solution. In this paper we suggest how to overcome this limitations by employing multiple (two in our case) CUDA devices for acceleration of our fine-grained communication-intensive parallel algorithm for LTL Model Checking.
  • Keywords
    "Computational modeling","Acceleration","Data structures","Kernel","Automata","Random access memory","Graphics processing unit"
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Systems (ICPADS), 2010 IEEE 16th International Conference on
  • ISSN
    1521-9097
  • Print_ISBN
    978-1-4244-9727-0
  • Type

    conf

  • DOI
    10.1109/ICPADS.2010.82
  • Filename
    5695611