• DocumentCode
    3641293
  • Title

    An example of DISPLAY-CTRL IP Component verification in SCE-MI based emulation platform

  • Author

    Włodzimierz Wrona;Paweł Duc;Łukasz Barcik;Wojciech Pietrasina

  • Author_Institution
    Evatronix S.A., Bielsko-Biala, Poland
  • fYear
    2011
  • fDate
    4/1/2011 12:00:00 AM
  • Firstpage
    59
  • Lastpage
    63
  • Abstract
    In this paper we present an example of a DISPLAY-CTRL IP component verification in an SCE-MI based emulation platform. The basic parts of this platform are some transactors. Their task is communication between the testbench written in the high level language SystemC (software side) and the IP component, placing in FPGA on an emulation board (hardware side) through an SCE-MI infrastructure. Using the platform to simulate the DISPLAY-CTRL IP component we achieve a performance increase of about 70× over software only event-driven simulation.
  • Keywords
    "Software","Hardware","IP networks","Clocks","Emulation","Field programmable gate arrays","XML"
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2011 IEEE 14th International Symposium on
  • Print_ISBN
    978-1-4244-9755-3
  • Type

    conf

  • DOI
    10.1109/DDECS.2011.5783047
  • Filename
    5783047
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3641293