• DocumentCode
    3641593
  • Title

    A computation and energy reduction technique for H.264 Deblocking Filter hardware

  • Author

    Yusuf Adibelli;Mustafa Parlak;Ilker Hamzaoglu

  • Author_Institution
  • fYear
    2011
  • fDate
    4/1/2011 12:00:00 AM
  • Firstpage
    210
  • Lastpage
    213
  • Abstract
    In this paper, we propose pixel equality based technique to reduce the amount of computations performed by H.264 Deblocking Filter (DBF) algorithm and therefore reduce the energy consumption of H.264 DBF hardware. This technique exploits pixel equality in a video frame by performing a small number of comparisons among edge pixels used in DBF equations before the filtering. If the input pixels are equal, DBF equations simplify significantly. The proposed technique reduces the amount of addition and shift operations performed by H.264 DBF algorithm up to 43% and 55% respectively with a small comparison overhead. The pixel equality based technique does not affect PSNR. We also implemented an efficient H.264 DBF hardware including the proposed technique using Verilog HDL. The proposed pixel equality based technique reduced the energy consumption of this hardware up to 35%.
  • Keywords
    "Hardware design languages","Pixel","Hardware","Ice","Random access memory","Signal processing","Conferences"
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and Communications Applications (SIU), 2011 IEEE 19th Conference on
  • ISSN
    2165-0608
  • Print_ISBN
    978-1-4577-0462-8
  • Type

    conf

  • DOI
    10.1109/SIU.2011.5929624
  • Filename
    5929624