DocumentCode :
3642323
Title :
Mapping Decision Diagrams for Multiple-Valued Logic Functions into Threshold Logic Networks
Author :
Milena Stankovic;Suzana Stojkovic;Claudio Moraga
Author_Institution :
Fac. of Electron., Dept. of Comput. Sci., Univ. of Nis, Nis, Serbia
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
111
Lastpage :
116
Abstract :
The paper presents a method for threshold logic realization of multiple valued functions through decision diagrams. New threshold logic modules convenient for mapping to decision diagrams are introduced and it is shown that these modules allow to reduce the complexity of the realization by using heterogeneous decision diagrams.
Keywords :
"Logic gates","Complexity theory","Data structures","Boolean functions","Multiplexing","Benchmark testing","Input variables"
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2011 41st IEEE International Symposium on
ISSN :
0195-623X
Print_ISBN :
978-1-4577-0112-2
Type :
conf
DOI :
10.1109/ISMVL.2011.28
Filename :
5954218
Link To Document :
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