Quaternary BiCMOS logic circuits with high-impedance output state

Principles and possibilities of synthesis and design of quaternary BiCMOS logic circuits with high-impedance output state are considered, proposed and described in the paper. Two principles of synthesis and implementation of BiCMOS quaternary logic circuits with high-impedance output state are proposed and described: the basic circuits with smaller number of transistors and the improved circuits with decreased propagation delay time. The concrete schemes of such quaternary BiCMOS logic circuits with high-impedance output state are given and analyzed by computer simulations. All given considerations, descriptions and solutions were confirmed by simulations. Some of computer simulation results are also given in the paper.