• DocumentCode
    3642601
  • Title

    Implementation framework for Artificial Neural Networks on FPGA

  • Author

    P. Škoda;T. Lipić;Á. Srp;B. Medved Rogina;K. Skala;F. Vajda

  • Author_Institution
    Ruđ
  • fYear
    2011
  • fDate
    5/1/2011 12:00:00 AM
  • Firstpage
    274
  • Lastpage
    278
  • Abstract
    In an Artificial Neural Network (ANN) a large number of highly interconnected simple nonlinear processing units work in parallel to solve a specific problem. Parallelism, modularity and dynamic adaptation are three characteristics typically associated with ANNs. Field Programmable Gate Array (FPGA) based reconfigurable computing architectures are well suited to implement ANNs as one can exploit concurrency and rapidly reconfigure to adapt the weights and topologies of an ANN. ANNs are suitable for and widely used in various real-life applications. A large portion of these applications are realized as embedded computer systems. With continuous advancements in VLSI technology FPGAs have become more powerful and power efficient, enabling the FPGA implementation of ANNs in embedded systems. This paper proposes an FPGA ANN framework which facilitates implementation in embedded systems. A case study of an ANN implementation in an embedded fall detection system is presented to demonstrate the advantages of the proposed framework.
  • Keywords
    "Field programmable gate arrays","Artificial neural networks","Neurons","Table lookup","Hardware","Parallel processing"
  • Publisher
    ieee
  • Conference_Titel
    MIPRO, 2011 Proceedings of the 34th International Convention
  • Print_ISBN
    978-1-4577-0996-8
  • Type

    conf

  • Filename
    5967064