Title : 
Analytical modeling of Single Event Transients propagation in combinational logic gates
         
        
            Author : 
X. Gili;S. Barcelo;S. Barceló;S. A. Bota;J. Segura
         
        
            Author_Institution : 
Grup de Sist. Electron., Univ. de les Illes Balears, Palma de Mallorca, Spain
         
        
        
        
        
            Abstract : 
We present a Single Event Transient (SET) propagation model that can be used to categorize the propagation likelihood of a given noise waveform trough a logic gate. This analysis is key to predict if a SET induced within a combinational block is capable of causing a SEU. The model predicts the output noise characteristics given the input noise waveform for each gate, and is applied to a 65-nm technology library. These noise transfer curves have a relatively simple analytical expression suitable for an easy adoption within CAD tools. Comparison between simulations and model show a good agreement for a commercial 65 nm technology.
         
        
            Keywords : 
"Logic gates","Semiconductor device modeling","Inverters","CMOS integrated circuits","Transient analysis","Libraries","CMOS technology"
         
        
        
            Conference_Titel : 
Radiation and Its Effects on Components and Systems (RADECS), 2011 12th European Conference on
         
        
        
            Print_ISBN : 
978-1-4577-0585-4
         
        
        
            DOI : 
10.1109/RADECS.2011.6131416